Updated Mac sensor names
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1 changed files with 13 additions and 13 deletions
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@ -63,27 +63,27 @@ SMC_IDS = {
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# Sources: https://github.com/beltex/SMCKit/blob/master/SMCKit/SMC.swift
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# Sources: https://github.com/beltex/SMCKit/blob/master/SMCKit/SMC.swift
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# http://www.opensource.apple.com/source/net_snmp/
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# http://www.opensource.apple.com/source/net_snmp/
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# https://github.com/jedda/OSX-Monitoring-Tools
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# https://github.com/jedda/OSX-Monitoring-Tools
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'TA0P': {'CPU Temp': False, 'Source': 'Ambient temp'},
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'TA0P': {'CPU Temp': False, 'Source': 'Ambient'},
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'TA0S': {'CPU Temp': False, 'Source': 'PCIE Slot 1 Ambient'},
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'TA0S': {'CPU Temp': False, 'Source': 'PCIE Slot 1 Ambient'},
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'TA1P': {'CPU Temp': False, 'Source': 'Ambient temp'},
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'TA1P': {'CPU Temp': False, 'Source': 'Ambient'},
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'TA1S': {'CPU Temp': False, 'Source': 'PCIE Slot 1 PCB'},
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'TA1S': {'CPU Temp': False, 'Source': 'PCIE Slot 1 PCB'},
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'TA2S': {'CPU Temp': False, 'Source': 'PCIE Slot 2 Ambient'},
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'TA2S': {'CPU Temp': False, 'Source': 'PCIE Slot 2 Ambient'},
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'TA3S': {'CPU Temp': False, 'Source': 'PCIE Slot 2 PCB'},
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'TA3S': {'CPU Temp': False, 'Source': 'PCIE Slot 2 PCB'},
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'TC0C': {'CPU Temp': True, 'Source': 'CPU Core 0'},
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'TC0C': {'CPU Temp': True, 'Source': 'CPU Core 1'},
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'TC0D': {'CPU Temp': True, 'Source': 'CPU die temp'},
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'TC0D': {'CPU Temp': True, 'Source': 'CPU Diode'},
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'TC0H': {'CPU Temp': True, 'Source': 'CPU heatsink temp'},
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'TC0H': {'CPU Temp': True, 'Source': 'CPU Heatsink'},
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'TC0P': {'CPU Temp': True, 'Source': 'CPU Ambient 1'},
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'TC0P': {'CPU Temp': True, 'Source': 'CPU Proximity'},
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'TC1C': {'CPU Temp': True, 'Source': 'CPU Core 1'},
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'TC1C': {'CPU Temp': True, 'Source': 'CPU Core 2'},
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'TC1P': {'CPU Temp': True, 'Source': 'CPU Ambient 2'},
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'TC1P': {'CPU Temp': True, 'Source': 'CPU Proximity 2'},
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'TC2C': {'CPU Temp': True, 'Source': 'CPU B Core 0'},
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'TC2C': {'CPU Temp': True, 'Source': 'CPU Core 3'},
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'TC2P': {'CPU Temp': True, 'Source': 'CPU B Ambient 1'},
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'TC2P': {'CPU Temp': True, 'Source': 'CPU Proximity 3'},
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'TC3C': {'CPU Temp': True, 'Source': 'CPU B Core 1'},
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'TC3C': {'CPU Temp': True, 'Source': 'CPU Core 4'},
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'TC3P': {'CPU Temp': True, 'Source': 'CPU B Ambient 2'},
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'TC3P': {'CPU Temp': True, 'Source': 'CPU Proximity 4'},
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'TCAC': {'CPU Temp': True, 'Source': 'CPU core from PCECI'},
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'TCAC': {'CPU Temp': True, 'Source': 'CPU core from PCECI'},
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'TCAH': {'CPU Temp': True, 'Source': 'CPU HeatSink'},
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'TCAH': {'CPU Temp': True, 'Source': 'CPU HeatSink'},
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'TCBC': {'CPU Temp': True, 'Source': 'CPU B core from PCECI'},
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'TCBC': {'CPU Temp': True, 'Source': 'CPU B core from PCECI'},
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'TCBH': {'CPU Temp': True, 'Source': 'CPU HeatSink'},
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'TCBH': {'CPU Temp': True, 'Source': 'CPU HeatSink'},
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'Te1P': {'CPU Temp': False, 'Source': 'PCIE ambient temp'},
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'Te1P': {'CPU Temp': False, 'Source': 'PCIE Ambient'},
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'Te1S': {'CPU Temp': False, 'Source': 'PCIE slot 1'},
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'Te1S': {'CPU Temp': False, 'Source': 'PCIE slot 1'},
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'Te2S': {'CPU Temp': False, 'Source': 'PCIE slot 2'},
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'Te2S': {'CPU Temp': False, 'Source': 'PCIE slot 2'},
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'Te3S': {'CPU Temp': False, 'Source': 'PCIE slot 3'},
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'Te3S': {'CPU Temp': False, 'Source': 'PCIE slot 3'},
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